When : Friday, September 25, 2015 - 11:00
Speaker : Pratap Pattnaik
Affiliation : IBM Fellow
Where : Aula Magna "A. Lepschy"
Short Bio :
Pratap Pattnaik is an IBM Fellow, and is currently the Senior Manager of the Scalable Systems group in the IBM Research Division. Over the past fifteen years, he and his team have developed a number of key technologies for IBM's high end Servers.His current research work includes the development and design of computer systems, including system and processor hardware, operating systems and autonomic components for IBM’s UNIX and mainframe Servers. In the past he has worked in the field of parallel algorithms for Molecular Dynamics, solutions of linear systems, Quantum Monte Carlo and theory of High Temperature Superconductivity, communication subsystems, fault management subsystems, etc. He also has over ten years of research experience in various aspects of integrated circuit design and fabrication, silicon processing, and condensed matter theory.
Abstract :
Bitcoin was an attempt to create a widely used decentralized, autonomous digital currency, that utilizes a set of computer algorithms and dissociated from any of the nation state. In reality, it is a digital and a scarce commodity. This talk will discuss the nature of the Bitcoin, the technical details behind its decentralization and the scarcity. It will also discuss the view of the state actors towards the Bitcoin, its evolution in market place and speculate on its future evolution.
When : Thursday, June 18, 2015 - 14:30
Speaker : Rodolphe Sepulchre
Affiliation : Dept. of Engineering, University of Cambridge, UK
Where : Aula Magna "A. Lepschy"
Short Bio :
Rodolphe Sepulchre received the engineering degree (1990) and the Ph.D. degree (1994), both in mathematical engineering, from the Universite catholique de Louvain, Belgium.He was a BAEF fellow in 1994 and held a postdoctoral position at the University of California, SantaBarbara from 1994 to 1996. He was a research associate of the FNRS at the Universite catholique de Louvain from 1995 to 1997. Since 1997, he has been professor in the department of Electrical Engineering and Computer Science at the Universite de Liege. He was department chair from 2009 to 2011. He held visiting positions at Princeton University (2002-2003) and the Ecole des Mines de Paris (2009-2010) and part-time positions at the University of Louvain (2000-2011)and at INRIA Lille Europe (2012-2013). He is now a Professor in the Department of Engineering at the University of Cambridge and a Fellow of Sidney Sussex College.In 2008, he was awarded the IEEE Control Systems Society Antonio Ruberti Young Researcher Prize. He is an IEEE fellow and an IEEE CSS distinguished lecturer since 2010. In 2015, he was awarded a Francqui Chair at the Université catholique de Louvain, Belgium.
Abstract :
If you enjoy testing the resistance of your interlocutor to non-scientific claims and wrong predictions, ask him to compare the brain and the machine. He might do better if he is not a scientist, but only moderately so. The talk will be by a control theorist, who does not know much about the brain and even less about the computer, but is fascinated by the concept of feedback, both in natural and artificial systems. Feedback is the concept that shaped the development of cybernetics, a discipline that sought to model the brain as a machine. Eventually cybernetics led to the invention of the computer, which became in turn a model for the brain, and turned cybernetics into history. But "cyber" recently reentered the technological hype. A feedback effect?
When : Wednesday, June 3, 2015 - 11:00
Speaker : Mérouane Debbah
Affiliation : Vice-President, Huawei France R&D Center, Paris
Where : Aula Magna "A. Lepschy"
Short Bio :
Mérouane Debbah entered the Ecole Normale Supérieure de Cachan (France) in 1996 where he received his M.Sc and Ph.D. degrees respectively. He worked for Motorola Labs (Saclay, France) from 1999-2002 and the Vienna Research Center for Telecommunications (Vienna, Austria) until 2003. From 2003 to 2007, he joined the Mobile Communications department of the Institut Eurecom (Sophia Antipolis, France) as an Assistant Professor. Since 2007, he is a Full Professor at CentraleSupelec (Gif-sur-Yvette, France). From 2007 to 2014, he was the director of the Alcatel-Lucent Chair on Flexible Radio. Since 2014, he is Vice-President of the Huawei France R&D center and director of the Mathematical and Algorithmic Sciences Lab. His research interests lie in fundamental mathematics, algorithms, complex systems analysis and optimization, statistics, information & communication sciences research. He is an Associate Editor in Chief of the journal Random Matrix: Theory and Applications and was an associate and senior area editor for IEEE Transactions on Signal Processing respectively in 2011-2013 and 2013-2014. Mérouane Debbah is a recipient of the ERC grant MORE (Advanced Mathematical Tools for Complex Network Engineering). He is a IEEE Fellow, a WWRF Fellow and a member of the academic senate of Paris-Saclay. He is the recipient of the Mario Boella award in 2005, the 2007 IEEE GLOBECOM best paper award, the Wi-Opt 2009 best paper award, the 2010 Newcom++ best paper award, the WUN CogCom Best Paper 2012 and 2013 Award, the 2014 WCNC best paper award as well as the Valuetools 2007, Valuetools 2008, CrownCom2009 , Valuetools 2012 and SAM 2014 best student paper awards. In 2011, he received the IEEE Glavieux Prize Award and in 2012, the Qualcomm Innovation Prize Award. In 2015, he received jointly the 2015 IEEE Communications Society Leonard G. Abraham Prize and 2015 IEEE Communications Society Fred W. Ellersick Prize. He is the co-founder of the start-up Ximinds.
Abstract :
The evolution of cellular networks is driven by the dream of ubiquitous wireless connectivity: Any data service is instantly accessible everywhere. With each generation of cellular networks, we have moved closer to this wireless dream; first by delivering wireless access to voice communications, then by providing wireless data services, and recently by delivering a WiFi-like experience with wide-area coverage and user mobility management. The support for high data rates has been the main objective in recent years, as seen from the academic focus on sum-rate optimization and the efforts from standardization bodies to meet the peak rate requirements specified in IMT-Advanced. In contrast, a variety of metrics/objectives are put forward in the technological preparations for 5G networks: higher peak rates, improved coverage with uniform user experience, higher reliability and lower latency, better energy efficiency, lower-cost user devices and services, better scalability with number of devices, etc. These multiple objectives are coupled, often in a conflicting manner such that improvements in one objective lead to degradation in the other objectives. Hence, the design of future networks calls for new optimization tools that properly handle the existence and tradeoffs between multiple objectives.
When : Monday, March 23, 2015 - 14:30
Speaker : Walter Snoeys
Affiliation : PH department, CERN, Geneva, Switzerland
Where : Aula Magna "A. Lepschy"
Short Bio :
Walter Snoeys was born in Leuven, Belgium in 1964. He received the MS and Ph.D. degrees in electrical engineering from the Katholieke Universiteit Leuven in 1987, and from Stanford University in 1992, respectively. From 1990 to 1992 he was a consultant in the area of integrated sensors. From 1992 to 1994 he worked on CMOS technology integration in Mietec, Alcatel, Belgium. In 1994 he joined the microelectronics group at CERN, Geneva, Switzerland, where he is currently working on the design of radiation tolerant particle detectors and readout chips in commercial deep-submicron CMOS for the high energy physics experiments. His research interests include analog circuit design, integrated sensors, technology and device physics, and radiation effects. In 1987 he received the Procter and Gamble ETC Fellowship from the Belgian American Educational Foundation.
Abstract :
Integrated circuits and devices revolutionized particle physics experiments, and have been a cornerstone in the recent discovery of the Higgs boson by the ATLAS and CMS experiments at the Large Hadron Collider at CERN. Particles are accelerated and brought into collision at specific interaction points. Detectors are giant cameras, about 40 m long by 20 m in diameter, constructed around these interaction points to take pictures of collision products as they fly away from the collision point. They contain millions of channels, often implemented as reverse biased silicon pin diode arrays covering areas of up to 200 m2 in the center of the experiment, generating a small (~1fC) electric charge upon particle traversals. Integrated circuits provide the readout, and accept collision rates of about 40 MHz with on-line selection of potentially interesting events before data storage. The presentation will cover some of the design challenges of these detectors and integrated circuits and also the trend to integrate both in one piece of silicon to meet requirements of particle physics experiments and to help advance our understanding of nature.
